Exemplary embodiments of the present invention relate to a photomask, and more particularly, to a method for correcting a critical dimension (CD) of a phase shift mask and a method for manufacturing the same.
In general, a semiconductor device includes various patterns. Such patterns are formed through a photolithography process and an etching process. As an example, a photoresist layer with solubility changing by light irradiation is formed on a pattern target layer on a semiconductor wafer. A predetermined region of the photoresist layer is exposed using a photomask, and a portion with solubility changed with respect to a developer is removed to form a photoresist pattern. The pattern target layer exposed by the photoresist pattern is etched and removed to form a pattern. However, as the integration density of semiconductor devices increases, the size of patterns decreases. Accordingly, in forming a pattern through a photolithography process, a pattern failure caused by resolution degradation may occur. Accordingly, researches are being conducted to develop various resolution enhancement techniques (RETs) that can enhance the resolution. One of the resolution enhancement techniques is a method using a phase shift photomask. The phase shift photomask includes a phase shift pattern on a transparent substrate and controls the phase of light by the phase shift pattern, thereby improving the resolution.
FIGS. 1 to 4 are cross-sectional views illustrating a method for manufacturing a known phase shift mask. FIG. 5 is a cross-sectional view illustrating the CD difference between a hard mask pattern and a phase shift pattern of a phase shift mask.
As illustrated in FIG. 1, a phase shift layer 110 and a hard mask layer 120 are formed on a substrate 100. A resist pattern 130 is formed on the hard mask layer 120. An etching process using the resist pattern 130 as an etch mask is performed to remove an exposed portion of the hard mask layer 120 and also an exposed portion of the phase shift layer 110. By this etching process, a phase shift pattern 112 and a hard mask pattern are formed as illustrated in FIG. 2. As illustrated in FIG. 3, the resist pattern 130 is removed to form a sequential stack of the phase shift pattern 112 and the hard mask pattern 122. As illustrated in FIG. 4, a predetermined region of the hard mask pattern 122 is removed to expose the phase shift pattern 112. A region where the phase shift pattern 112 is exposed corresponds to a region where the patterns are transferred on the wafer, an example of which is a cell region. Also, a region where the hard mask pattern 122 remains corresponds to a region where the patterns are not transferred on the wafer, an example of which is a frame region of the photomask.
In this process, the phase shift pattern 112 must be formed to have a critical dimension (CD) (i.e., a pattern size) equal to a designed CD. However, in an actual process, some of the phase shift patterns 112 may have a CD different from the designed CD. In this case, the patterns transferred and formed on the wafer may also have a CD different from the designed CD, thus causing a malfunction of the device. Thus, the CD of the phase shift pattern 112 is corrected in the phase shift mask manufacturing process. The CD of the phase shift pattern 112 must be measured in order to correct the CD of the hard mask pattern 122. However, as illustrated in FIG. 3, the hard mask pattern 122 is formed on the phase shift pattern 112 after the removing of the resist pattern 130. Therefore, it is difficult to directly measure the CD of the phase shift pattern 112. Thus, the CD of the hard mask pattern 122 is measured, instead of directly measuring the CD of the phase shift pattern 112, and whether to correct the CD of the phase shift pattern 112 is determined according to the measurement results.
However, the hard mask pattern 122 is used as an etch barrier layer in the etching process for forming the phase shift pattern 112, and is formed of a different material than the phase shift pattern 112. Accordingly, the hard mask pattern 122 has a different etch rate than the phase shift pattern 112. Thus, as illustrated in FIG. 5, the CD1 of the phase shift pattern 112 with a relatively high etch rate may become smaller than the CD2 of the hard mask pattern 122 with a relatively low etch rate, after the performing of the etching process for forming the hard mask pattern 122 and the phase shift pattern 112. This difference between the CD1 of the phase shift pattern 112 and the CD2 of the hard mask pattern 122 is defined as a delta CD ΔCD. The delta CD ΔCD is equal to the difference between the CD Mean To Target (MTT) of the hard mask pattern 122 and the CD MTT of the phase shift pattern 112. Here, the CD MTT represents the difference between the actually-measured CD value and the designed CD value.
According to a known art, in order to correct the CD of the phase shift pattern 112, the CD, e.g., CD MTT of the hard mask pattern 122 is measured and the CD MTT of the phase shift pattern 112 is estimated to be the difference between the delta CD ΔCD and the measured CD MTT of the hard mask pattern 122. Then, an additional etching process is performed for correction by the estimated CD MTT of the phase shift pattern 112. However, the CD of the hard mask pattern 122 changes severely in its measurement process, thus exhibiting poor repeatability. The poor repeatability may be caused by various factors, an example of which is a steep side slope of the pattern profile of the hard mask pattern 122. Also, the measurement result may vary according to the measurement conditions or the states of the measurement equipment. When the CD measurement of the hard mask pattern 122 vary by various parameters according to the measurement conditions, the accuracy of the measured CD MTT of the hard mask pattern 122 decreases, thus making it difficult to calculate the accurate CD MTT of the phase shift pattern 112, although the delta CD ΔCD is accurate. When an additional etching process is performed on the basis of the inaccurate CD MTT of the phase shift pattern 112, the resulting CD of the phase shift pattern 112 may be greatly different from the designed CD. In addition, the delta CD ΔCD is predetermined through a plurality of test processes, but no correction is made to the delta CD ΔCD although the measurement conditions of the test processes performed to determine the delta CD ΔCD are different from the conditions of the measurement performed for actual correction.